Title:
GPS処理構成
Document Type and Number:
Japanese Patent JP4954986
Kind Code:
B2
Abstract:
A software GPS processing arrangement comprising a FIFO buffer for receiving a stream of the GPS signal samples, a memory, a DMA controller for transferring the GPS signal samples from the FIFO buffer to the memory, a CPU running GPS signal processing software configured to retrieve the GPS signal samples from the memory and process them to obtain a position fix, and a counter operating independently of the DMA controller and the CPU for keeping count of the number of streamed GPS signal samples.
Inventors:
David, E. Penna
Stefan, A. Tickel
Stefan, A. Tickel
Application Number:
JP2008515361A
Publication Date:
June 20, 2012
Filing Date:
June 07, 2006
Export Citation:
Assignee:
NXP B.V.
International Classes:
G01S19/37; G01S19/24; G01S19/34
Domestic Patent References:
| JP2000241192A | ||||
| JP2007504771A |
Foreign References:
| WO2005047923A1 |
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Takeshi Sekine
Takahashi
Hidetoshi Tachibana
Takeshi Sekine
Takahashi