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Title:
半導体薄膜素子の製造方法
Document Type and Number:
Japanese Patent JP5048033
Kind Code:
B2
Abstract:

To provide a method of manufacturing a semiconductor thin-film element that minimizes a decline in electron mobility and simultaneously reduces a temperature dependency of resistance, and uses an InSb thin film containing Sn as an n-type dopant which is excellent in reproducibility and controllability of the thin film.

Sn is doped as a dopant in an operation layer which is comprised of a compound semiconductor thin-film layer including InSb, which is directly or indirectly laminated on a substrate via an organic substance bonding layer or a buffer layer, or when a group III to V compound semiconductor layer adjacent to the operation layer is formed by an MBE method. During the doping process, the temperature of the substrate is kept between 380°C and 400°C and an Sn K cell temperature is kept at 500°C or more and 1,000°C or below.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
Atsushi Okamoto
Shin Murakami
Ichiro Shibasaki
Application Number:
JP2009229922A
Publication Date:
October 17, 2012
Filing Date:
October 01, 2009
Export Citation:
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Assignee:
Asahi Kasei Electronics Co., Ltd.
International Classes:
H01L43/14; H01L21/203; H01L43/06; H01L43/08; H01L43/12
Domestic Patent References:
JP3106085A
JP61131582A
JP61161760A
JP7176494A
JP59116192A
JP3106017A
JP10340856A
Attorney, Agent or Firm:
Yoshikazu Tani



 
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