Title:
ディジタル電力制御システム用フィルタ補償係数を最適化する方法およびシステム
Document Type and Number:
Japanese Patent JP5081303
Kind Code:
B2
Abstract:
A method and system is provided for optimizing the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. A power control system comprises at least one point-of-load (POL) regulator having a power conversion circuit adapted to convey power to a load and a digital controller coupled to the power conversion circuit though a feedback loop. The digital controller is adapted to provide a pulse width modulated control signal to the power switch responsive to a feedback measurement of an output of the power conversion circuit. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. The digital controller periodically stores a successive one of a plurality of samples of the feedback measurement. A serial data bus operatively connects the POL regulator to a system controller. The system controller retrieves each successive stored sample from the digital controller via the serial data bus. After retrieving a pre-determined number of the samples, the system controller calculates optimized filter coefficients for the digital filter and communicates the optimized filter coefficients to the digital controller. The digital controller thereafter uses the optimized filter coefficients in the digital filter.
Inventors:
Capuis, Align
Application Number:
JP2010518291A
Publication Date:
November 28, 2012
Filing Date:
July 16, 2008
Export Citation:
Assignee:
Power-One Incorporated
International Classes:
H02M3/155
Foreign References:
| US20040246754 | ||||
| US20060227860 | ||||
| US20030090255 |
Attorney, Agent or Firm:
Shinjiro Ono
Kazuo Shamoto
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Motoharu Nakanishi
Kazuo Shamoto
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Motoharu Nakanishi