Title:
アクティブマトリックス型ディスプレイ及び駆動方法
Document Type and Number:
Japanese Patent JP5118312
Kind Code:
B2
Abstract:
The display comprises an array of pixel circuits each comprising an emitter 1 in series with a current modulation transistor Tr 2 , and at least one address circuit 25, which integrates, for each column, a differential amplifier 2 and a passive element 4, preferably a resistive element, which cooperate with the current modulation transistors Tr 2 so as to form, during address phases in which the emitters are switched "out of the circuit", a voltage-programmable current generator. After the address phases, thanks to a suitable switch Tr 4 , the emitters 1 are switched "into the circuit" and supplied with the preprogrammed current. Such a display allows the image display quality to be inexpensively improved.
Inventors:
Philippe Leroy
Christoph Pula
Pielic martin
Christoph Pula
Pielic martin
Application Number:
JP2006108999A
Publication Date:
January 16, 2013
Filing Date:
April 11, 2006
Export Citation:
Assignee:
Thomson Licensing
International Classes:
G09G3/30; G09G3/20
Domestic Patent References:
| JP2007516454A | ||||
| JP2007506145A | ||||
| JP2003058106A | ||||
| JP2004192000A |
Foreign References:
| WO2005013250A1 | ||||
| WO2005029456A1 | ||||
| US20030030603 |
Attorney, Agent or Firm:
Tadahiko Ito
Shinsuke Onuki
Tadashige Ito
Shinsuke Onuki
Tadashige Ito