Title:
アウトオブオーダープロセッサにおけるトランザクショナルメモリ
Document Type and Number:
Japanese Patent JP5118652
Kind Code:
B2
Abstract:
Methods and apparatus to provide transactional memory execution in out-of-order processors are described. In one embodiment, a stored value corresponds to the number of transactional memory access requests that are uncommitted. The stored value may be used to provide nested recovery in case of an error, fault, etc. in accordance with a described embodiment.
Inventors:
Rajwar, Ravi
Accary, hitam
Ray, Conrad
Accary, hitam
Ray, Conrad
Application Number:
JP2008556588A
Publication Date:
January 16, 2013
Filing Date:
March 20, 2007
Export Citation:
Assignee:
INTEL CORPORATION
International Classes:
G06F9/38; G06F9/52; G06F12/08
Domestic Patent References:
| JP9138779A |
Foreign References:
| US5765208 | ||||
| US20070239797 |
Other References:
C.Scot Ananian et al.,"Unbounded Transactional Memory",11th International Symposium on High-Performance Computer Architecture,米国,IEEE,2005年 2月16日,pages:316-327
Ravi Rajwar et al.,"Virtualizing Transactional Memory",Proceedings. 32nd International Symposium on Computer Architecture,2005.ISCA '05.,米国,IEEE,2005年 6月 8日,pages:494-505
Maurice Herlihy et al.,"Transactional Memory: Architectural Support For Lock-free Data Structures",Proceedings of the 20th Annual International Symposium on Computer Architecture,1993,米国,IEEE,1993年 5月19日,pages:289-300
Ravi Rajwar et al.,"Virtualizing Transactional Memory",Proceedings. 32nd International Symposium on Computer Architecture,2005.ISCA '05.,米国,IEEE,2005年 6月 8日,pages:494-505
Maurice Herlihy et al.,"Transactional Memory: Architectural Support For Lock-free Data Structures",Proceedings of the 20th Annual International Symposium on Computer Architecture,1993,米国,IEEE,1993年 5月19日,pages:289-300
Attorney, Agent or Firm:
Akihiro Ryuka
Kazutoshi Iiyama
Akashi Hideya
Higashiyama Tadayoshi
Shigenori Hayashi
Manabu Takada
Kazutoshi Iiyama
Akashi Hideya
Higashiyama Tadayoshi
Shigenori Hayashi
Manabu Takada