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Title:
積層型電子部品およびその製造方法
Document Type and Number:
Japanese Patent JP5127703
Kind Code:
B2
Abstract:
A method for manufacturing a multilayer electronic component includes the steps of preparing a laminate including a plurality of laminated insulating layers and a plurality of internal electrodes disposed along interfaces between the insulating layers, edges of the internal electrodes being exposed at a predetermined surface of the laminate, and forming an external electrode on the predetermined surface to electrically connect exposed the edges of the internal electrodes. The step of forming an external electrode includes a plating step of forming a continuous plating film by depositing plating deposits on the edges of the internal electrodes exposed at the predetermined surface and by performing plating growth to be connected to each other, and a heat treatment step of performing a heat treatment at an oxygen partial pressure of about 5 ppm or less and at a temperature of about 600° C. or more.

Inventors:
Akihiro Motoki
Makoto Ogawa
Kenichi Kawasaki
Shunsuke Takeuchi
Shigeyuki Kuroda
Application Number:
JP2008514836A
Publication Date:
January 23, 2013
Filing Date:
September 26, 2007
Export Citation:
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Assignee:
MURATA MANUFACTURING CO.,LTD.
International Classes:
H01G4/30; H01G4/12; H01G4/232; H01G4/252
Domestic Patent References:
JPS63169014A1988-07-13
JPH07201638A1995-08-04
JPH02123790A1990-05-11
JPS6325723A1988-02-03
Attorney, Agent or Firm:
Masaaki Koshiba



 
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