Title:
半導体集積回路
Document Type and Number:
Japanese Patent JP5146847
Kind Code:
B2
Abstract:
A semiconductor integrated circuit includes: an oxide resistance change element, a constant current source circuit supplying a write current to the oxide resistance change element, and a voltage clamper clamping a voltage in a path in which a write current flows. The voltage clamper is arranged in parallel with the path between the constant current source circuit and the oxide resistance change element.
Inventors:
Naohiko Sugibayashi
Application Number:
JP2009507420A
Publication Date:
February 20, 2013
Filing Date:
January 17, 2008
Export Citation:
Assignee:
NEC
International Classes:
G11C13/00
Domestic Patent References:
| JP2004118923A | 2004-04-15 |
Foreign References:
| WO2008068801A1 | 2008-06-12 | |||
| WO2008105155A1 | 2008-09-04 | |||
| WO2008068801A1 | 2008-06-12 |
Attorney, Agent or Firm:
Minoru Kudo