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Title:
マイクロエレクトロニクスデバイスのパターンを腐食から保護する構造およびそれを形成する方法
Document Type and Number:
Japanese Patent JP5165247
Kind Code:
B2
Abstract:
New protective coating layers for use in wet etch processes during the production of semiconductor and MEMS devices are provided. The layers include a primer layer, a first protective layer, and an optional second protective layer. The primer layer preferably comprises an organo silane compound in a solvent system. The first protective layer includes thermoplastic copolymers prepared from styrene, acrylonitrile, and optionally other addition-polymerizable monomers such as (meth)acrylate monomers, vinylbenzyl chloride, and diesters of maleic acid or fumaric acid. The second protective layer comprises a highly halogenated polymer such as a chlorinated polymer which may or may not be crosslinked upon heating.

Inventors:
Richeon On
Ruben Kimberley A.
Flame Tony Dee.
Application Number:
JP2006549513A
Publication Date:
March 21, 2013
Filing Date:
January 07, 2005
Export Citation:
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Assignee:
Brewer Science INC.
International Classes:
H01L21/306; B32B9/04; C09D125/12; C23F1/00; H01L21/308; H01L21/311
Domestic Patent References:
JP3170683A
JP544070A
JP5434769A
Attorney, Agent or Firm:
Nozomi Watanabe
Haruko Sanwa