Title:
試験装置、電子デバイスおよび試験方法
Document Type and Number:
Japanese Patent JP5183622
Kind Code:
B2
Abstract:
There is provided a test apparatus for testing a device under test. The test apparatus includes an instruction storing section that stores thereon a test instruction sequence, a pattern generating section that sequentially reads and executes an instruction from the test instruction sequence, and outputs a test pattern associated with the executed instruction, a test signal output section that generates a test signal in accordance with the test pattern, and supplies the generated test signal to the device under test, and a result register that stores thereon a value having a predetermined number of bits. Here, the instruction storing section stores thereon the test instruction sequence including therein a result register update instruction to update a value of a designated bit position in the result register with a predetermined value, and when executing the result register update instruction, the pattern generating section updates, with the predetermined value, the value of the bit position in the result register which is designated by the result register update instruction.
Inventors:
Tatsuya Yamada
Application Number:
JP2009505161A
Publication Date:
April 17, 2013
Filing Date:
March 12, 2008
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G01R31/3183; G01R31/319; H01L21/822; H01L27/04; H04L69/40
Domestic Patent References:
| JPH0773700A | 1995-03-17 | |||
| JP2004264047A | 2004-09-24 | |||
| JP2000040389A | 2000-02-08 | |||
| JP2004233355A | 2004-08-19 | |||
| JPH10271113A | 1998-10-09 | |||
| JPH0773700A | 1995-03-17 | |||
| JP2004264047A | 2004-09-24 |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation