Title:
積層型チップキャパシタ及びこれを備えた回路基板装置
Document Type and Number:
Japanese Patent JP5278800
Kind Code:
B2
Abstract:
There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units disposed in a laminated direction; first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively; and at least one connecting conductor line connecting the first and third outer electrodes having identical polarity to each other and the second and fourth outer electrodes having identical polarity to each other, wherein the first capacitor body includes first and second inner electrodes, the second capacitor unit includes a plurality of third and fourth inner electrodes, the first to fourth outer electrodes are connected to the first to fourth inner electrodes, respectively, and an equivalent series resistance (R1) of the first capacitor unit and a combined equivalent series resistance (R2') of the second capacitor and the connecting conductor line satisfy the Equation 0.7(R1)<=R2'<=1.3(R1).
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Inventors:
Lee, Byung Hwa
Woo, Sun Kwon
Chun, Hesk
Park, Dong Suk
Park, Sansoe
Park, Min Chul
Woo, Sun Kwon
Chun, Hesk
Park, Dong Suk
Park, Sansoe
Park, Min Chul
Application Number:
JP2008283774A
Publication Date:
September 04, 2013
Filing Date:
November 04, 2008
Export Citation:
Assignee:
Samsung Electro-Mechanics Co., Ltd.
International Classes:
H01G4/30; H01G2/06; H01G4/232; H05K3/46
Domestic Patent References:
JP2007329504A | ||||
JP63191623U | ||||
JP2007250973A | ||||
JP2000195742A | ||||
JP2007129224A |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation
Previous Patent: JPS5278799
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