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Title:
不揮発性半導体記憶装置
Document Type and Number:
Japanese Patent JP5288936
Kind Code:
B2
Abstract:
A memory string has a semiconductor layer with a joining portion that is formed to join a plurality of columnar portions extending in a vertical direction with respect to a substrate and lower ends of the plurality of columnar portions. First conductive layers are formed in a laminated fashion to surround side surfaces of the columnar portions and an electric charge storage layer, and function as control electrodes of memory cells. A second conductive layer is formed around the plurality of columnar portions via a gate insulation film, and functions as control electrodes of selection transistors. Bit lines are formed to be connected to the plurality of columnar portions, respectively, with a second direction orthogonal to a first direction taken as a longitudinal direction.

Inventors:
Fukuzumi Yoshiaki
Hideaki Aochi
Ryuta Katsumata
Kito Jie
Kito Dai
Kei'an Tanaka
Yousuke Komori
Megumi Ishizuki
Application Number:
JP2008207655A
Publication Date:
September 11, 2013
Filing Date:
August 12, 2008
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
H01L21/8247; H01L21/336; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
JP2003092366A
JP10093083A
JP2007317874A
JP2005093808A
Attorney, Agent or Firm:
Kisaragi International Patent Business Corporation