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Title:
固体真空デバイス
Document Type and Number:
Japanese Patent JP5302596
Kind Code:
B2
Abstract:

To provide a solid vacuum device that can have high performance.

A thermal device element portion 20 supported by a first polysilicon layer 12 is formed on one surface side of a silicon substrate 10, and a cap portion 40 for vacuum sealing is formed enclosing the thermal device element portion 20. The cap portion 40 for vacuum sealing includes: a porous portion 42 for vacuum sealing, the porous portion being formed by subjecting, to anodic oxidation, part of a second polysilicon layer 41 formed on the one surface side of the silicon substrate 10; and a cap layer 43 laminated on the porous portion 42 for vacuum sealing. A first space 15 of the thermal device element portion 20 on the side of the silicon substrate 10 and a second space 35 on the side of the cap portion 40 for vacuum sealing are evacuated. The solid vacuum device includes a heat insulation portion 13 comprised of a porous polysilicon portion formed by subjecting part of the first polysilicon layer 12 to anodic oxidation and thermally insulating the thermal device element portion 20 and silicon substrate 10.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
Yoshiaki Honda
Yoshifumi Watanabe
Yuichi Inaba
Application Number:
JP2008206013A
Publication Date:
October 02, 2013
Filing Date:
August 08, 2008
Export Citation:
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Assignee:
Panasonic Corporation
International Classes:
H01L35/32; G01J1/02; H01L37/00
Domestic Patent References:
JP2002205299A
JP2004271386A
Other References:
Rihui He et al.,On-Wafer Monolithic Encapsulation by Surface Micromachining With Porous Polysilicon Shell,JOURNAL OF MICROELECTROMECHANICAL SYSTEMS,米国,2007年 4月,Vol.16, No.2,p.462-472
Attorney, Agent or Firm:
Keisei Nishikawa