Title:
集積回路装置のための共通重心静電放電保護
Document Type and Number:
Japanese Patent JP5318960
Kind Code:
B2
Abstract:
A method of protecting a circuit design implemented within an integrated circuit (IC) from electrostatic discharge (ESD) can include positioning a device array pair comprising first and second device arrays on the IC to share a common centroid, wherein the first and second device arrays are matched. An ESD diode array pair comprising first and second ESD diode arrays can be positioned on the IC adjacent to a first perimeter encompassing the first and second device arrays, wherein the first and second ESD diode arrays share the common centroid and are matched. A cathode terminal of each ESD diode of the first ESD diode array can be coupled to an input of the first device array, and a cathode terminal of each ESD diode of the second ESD diode array can be coupled to an input of the second device array.
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Inventors:
Carp, james
Application Number:
JP2011529042A
Publication Date:
October 16, 2013
Filing Date:
July 13, 2009
Export Citation:
Assignee:
XILINX INCORPORATED
International Classes:
H01L21/822; H01L21/82; H01L21/8234; H01L27/04; H01L27/06; H01L27/088
Domestic Patent References:
| JP2004296994A | ||||
| JP6163823A | ||||
| JP2001168197A | ||||
| JP2004031407A |
Foreign References:
| WO2004051741A1 |
Attorney, Agent or Firm:
Fukami patent office