Title:
差動増幅回路
Document Type and Number:
Japanese Patent JP5406113
Kind Code:
B2
Abstract:
Provided is a differential amplifier circuit in which an offset voltage is independent from input voltages. A first correction current generation circuit and a second correction current generation circuit are provided and configured to cause the same current as a current flowing through a folded cascode amplifying stage to flow into an output stage. Accordingly, transistors included in the folded cascode amplifying stage and transistors included in the output stage have the same bias condition.
Inventors:
Atsushi Igarashi
Masahiro Mitani
Masahiro Mitani
Application Number:
JP2010107656A
Publication Date:
February 05, 2014
Filing Date:
May 07, 2010
Export Citation:
Assignee:
Seiko Instruments Inc.
International Classes:
H03F3/45
Domestic Patent References:
| JP2001144558A | ||||
| JP2006314040A | ||||
| JP2000223970A | ||||
| JP1264406A | ||||
| JP60184314U |
Attorney, Agent or Firm:
Kentaro Kuhara
Noriaki Uchino
Nobuyuki Kimura
Noriaki Uchino
Nobuyuki Kimura