Title:
過電圧保護回路
Document Type and Number:
Japanese Patent JP5406443
Kind Code:
B2
Abstract:
An input terminal is externally input with an input voltage. An output transistor of N-channel MOSFET is arranged between the input terminal and an output terminal. A charge pump circuit steps up the input voltage. An error amplifier receives a voltage stepped up by the charge pump circuit as a power supply, and outputs an error voltage of a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage to a gate of the output transistor. A controller compares the input voltage with a predetermined threshold voltage, and forcibly turns OFF the output transistor when the input voltage is higher than the threshold voltage.
Inventors:
Yoichi Sogai
Application Number:
JP2007274655A
Publication Date:
February 05, 2014
Filing Date:
October 23, 2007
Export Citation:
Assignee:
ROHM Co., Ltd.
International Classes:
H02H3/20; G05F1/56
Domestic Patent References:
| JP64055066A | ||||
| JP2004280136A | ||||
| JP9322390A | ||||
| JP4280670A | ||||
| JP2006254641A | ||||
| JP11187578A | ||||
| JP2007274883A |
Foreign References:
| WO1998058382A1 |
Attorney, Agent or Firm:
Sakaki Morishita