Title:
インターポーザ上へのパッチ取り付け及びそれにより形成される構造体及びその製造方法
Document Type and Number:
Japanese Patent JP5687709
Kind Code:
B2
Abstract:
Methods of forming microelectronic structures are described. Embodiments of those methods include attaching a patch structure to an interposer by thermal compression bonding, forming an underfill around an array of interconnect structures disposed on a top surface of the interposer, curing the underfill, and then attaching a die to the patch structure.
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Inventors:
ロバーツ，ブレント エム．
ロイ，ミヒール ケイ．
スリニヴァサン，スリラム
ロイ，ミヒール ケイ．
スリニヴァサン，スリラム
Application Number:
JP2012539093A
Publication Date:
March 18, 2015
Filing Date:
December 10, 2010
Export Citation:
Assignee:
インテル コーポレイション
International Classes:
H01L23/12; H01L23/32
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Shinsuke Onuki
Tadahiko Ito
Shinsuke Onuki