Title:
プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス
Document Type and Number:
Japanese Patent JP5699057
Kind Code:
B2
Abstract:
In the event of a software error, operations of a programmable device must be suspended while a configuration memory is being rewritten; however, with a system such as a communication device that will be significantly affected if the device is shut down, the system needs to be restored without suspending the operations. This programmable device is provided with: multiple control circuits; a comparison unit that compares outputs of the multiple control circuits so as to inspect for an occurrence of an error; a storage unit that stores internal states of error-free control circuits among the multiple control circuits when an occurrence of an error is determined by the comparison unit; a reconfiguration unit that reconfigures the control circuit in which the occurrence of the error has been determined by the comparison unit; and a control unit that inputs the internal states of the error-free control circuits, which are stored in the storage unit, to the control circuit in which the occurrence of the error has been determined by the comparison unit.
Inventors:
Tadanobu Toba
Kenichi Shinbo
Kenichi Shinbo
Application Number:
JP2011182103A
Publication Date:
April 08, 2015
Filing Date:
August 24, 2011
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
H03K19/173
Other References:
ICHINOMIYA Yoshihiro, TANOUE Shiro, AMAGASAKI Motoki, KUGA Morihiro, SUEYOSHI Toshinori,Fault Recovery Technique for Softcore Processor using Partial Reconfiguration,IEICE Technical Report RECONF2009-79,日本,電子情報通信学会,2010年 1月19日,Vol.109 No.395,pp.155-160
ICHINOMIYA Yoshihiro, TANOUE Shiro, YABUTA Toshio, AMAGASAKI Motoki, KUGA Morihiro, SUEYOSHI Toshino,Recovery and syncronization technique for TMR softcore processor,IEICE Technical Report RECONF2009-9,日本,電子情報通信学会,2009年 5月 7日,Vol.103 No.26,p49-54
Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagaseki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyos,improving the Robustness of a Softcore Processor against SEUs by using TMR and Partial Reconfigurati,18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines,米国,IEEE,2010年 5月 4日,p47-54
KIMURA Tsuyoshi, KAI Noritaka, TSUTSUMI Yoshiaki, AMAGASAKI Motoki, KUGA Morihiro, SUEYOSHI Toshinor,A Case Study of Evaluation Technique for Soft Error Tolerance on SRAMs-based FPGAs,IEICE Technical Report RECONF2010-7,日本,電子情報通信学会,2010年 5月 6日,Vol.110 No.32,p37-42
ICHINOMIYA Yoshihiro, TANOUE Shiro, YABUTA Toshio, AMAGASAKI Motoki, KUGA Morihiro, SUEYOSHI Toshino,Recovery and syncronization technique for TMR softcore processor,IEICE Technical Report RECONF2009-9,日本,電子情報通信学会,2009年 5月 7日,Vol.103 No.26,p49-54
Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagaseki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyos,improving the Robustness of a Softcore Processor against SEUs by using TMR and Partial Reconfigurati,18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines,米国,IEEE,2010年 5月 4日,p47-54
KIMURA Tsuyoshi, KAI Noritaka, TSUTSUMI Yoshiaki, AMAGASAKI Motoki, KUGA Morihiro, SUEYOSHI Toshinor,A Case Study of Evaluation Technique for Soft Error Tolerance on SRAMs-based FPGAs,IEICE Technical Report RECONF2010-7,日本,電子情報通信学会,2010年 5月 6日,Vol.110 No.32,p37-42
Attorney, Agent or Firm:
Manabu Inoue
Yuji Toda
Shigemi Iwasaki
Yuji Toda
Shigemi Iwasaki
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