Title:
耐高電圧受信機
Document Type and Number:
Japanese Patent JP5706002
Kind Code:
B2
Abstract:
A high voltage tolerant single ended receiver circuit includes a voltage divider that is operative to divide in half single ended input signals that are greater than the threshold voltages of the voltage divider. A pass gate circuit is operative to receive single ended signals that are below the threshold voltages of the voltage divider. Output from the voltage divider is coupled to a first input of a modified Schmitt trigger circuit to control a high threshold level of the Schmitt trigger circuit. Output from the pass gate circuit is coupled to a second input of the modified Schmitt trigger circuit to control a low threshold level of the Schmitt trigger circuit.
Inventors:
Unkit Srivastaba
Xiao Huang
Xiao Hong Kwang
Xiao Huang
Xiao Hong Kwang
Application Number:
JP2013551382A
Publication Date:
April 22, 2015
Filing Date:
January 27, 2012
Export Citation:
Assignee:
Qualcomm, Inc.
International Classes:
H04L25/02; G06F3/00
Domestic Patent References:
| JP2004531154A | ||||
| JP2002300011A | ||||
| JP2005136515A | ||||
| JP10508998A | ||||
| JP6224701A |
Attorney, Agent or Firm:
Yasuhiko Murayama
Kuroda Shinpei
Kuroda Shinpei