Title:
電子デバイス
Document Type and Number:
Japanese Patent JP5745244
Kind Code:
B2
Abstract:
An electronic device employing a graphene layer as a charge carrier layer. The graphene layer is sandwiched between layers that are constructed of a material having a highly ordered crystalline structure and a high dielectric constant. The highly ordered crystalline structure of the layers surrounding the graphene layer has low density of charged defects that can lead to scattering of charge carriers in the graphene layer. The high dielectric constant of the layers surrounding the graphene layer also prevents charge carrier scattering by minimizing interaction between the charge carriers and the changed defects in the surrounding layers. An interracial layer constructed of a thin, non-polar, dielectric material can also be provided between the graphene layer and each of the highly ordered crystalline high dielectric constant layers to minimize charge carrier scattering in the graphene layer through remote interfacial phonons.
More Like This:
| JPS57133671 | LATERAL TRANSISTOR DEVICE |
| JP3681741 | SEMICONDUCTOR DEVICE |
| WO/1997/019516 | A CLOCKED HIGH VOLTAGE SWITCH |
Inventors:
Ernest E Marinello
Simone Pisana
Simone Pisana
Application Number:
JP2010209748A
Publication Date:
July 08, 2015
Filing Date:
September 17, 2010
Export Citation:
Assignee:
H.G. Esteneetherland Bee Buoy
International Classes:
H01L29/06; H01L21/336; H01L21/338; H01L27/28; H01L29/16; H01L29/778; H01L29/786; H01L29/812; H01L43/08; H01L51/05; H01L51/30; H01L51/40
Domestic Patent References:
| JP2009527127A | ||||
| JP2009182173A | ||||
| JP2007294628A | ||||
| JP2005285822A |
Attorney, Agent or Firm:
Ken Ieiri