Title:
静電気放電保護用回路装置
Document Type and Number:
Japanese Patent JP5771330
Kind Code:
B2
Abstract:
A circuit arrangement for protecting against electrostatic discharges comprises a diverter (ECL) that is suitable for diverting an electrostatic discharge between a first terminal (IO) and a second terminal (VDD, VSS), as well as a compensation device (1). The compensation device (1) features a series circuit of a first resistor (RS) and a field effect transistor (T1) that is connected between the first terminal (IO) and the second terminal (VDD, VSS). A junction (K1) between the first resistor (RS) and the field effect transistor (T1) is connected to the gate terminal (G1) of the field effect transistor (T1) via an RC series circuit that acts as a low-pass filter.
More Like This:
Inventors:
Rheinprecht, Wolfgang
Application Number:
JP2014523299A
Publication Date:
August 26, 2015
Filing Date:
July 30, 2012
Export Citation:
Assignee:
ams AG
International Classes:
H01L21/822; H01L27/04; H02H9/04
Domestic Patent References:
| JP58147068A | ||||
| JP2007096150A | ||||
| JP2009152484A | ||||
| JP2008251755A | ||||
| JP2009534845A |
Attorney, Agent or Firm:
Nobuyuki Okajima