Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP5784558
Kind Code:
B2
Abstract:
According to one embodiment, a semiconductor memory device includes a memory cell provided with a pair of storage nodes which store data in a complementary manner, a pair of bit lines that are driven in a complementary manner based on data written to the memory cell, a word line that selects a row of the memory cell, and a word line potential fixing circuit that fixes a potential of the word line so that the row of the memory cell is not selected when a power supply of the memory cell rises.
Inventors:
Go Midorikawa
Shinro Otsuka
Shinro Otsuka
Application Number:
JP2012179723A
Publication Date:
September 24, 2015
Filing Date:
August 14, 2012
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G11C11/413; G11C11/412
Domestic Patent References:
| JP3073494A | ||||
| JP2006059468A | ||||
| JP2000298987A | ||||
| JP11219589A |
Attorney, Agent or Firm:
Hiroaki Sakai