Title:
ＯＴＰメモリ
Document Type and Number:
Japanese Patent JP5785826
Kind Code:
B2
Abstract:
The present invention provides an OTP memory having higher confidentiality. A memory cell has a memory transistor forming a current path between first and second nodes, a selection transistor forming a current path between third and fourth nodes, the third node being coupled to the gate of the memory transistor via a line, and a capacitor coupled to the first node. By applying high voltage which does not break but deteriorates a gate oxide film and increases gate leak current to a memory transistor, data is written. Data can be read by the presence/absence of leak of charges accumulated in the capacitor. Since the position of deterioration in the gate oxide film cannot be discriminated by a physical analysis, confidentiality is high.
Inventors:
Kenichi Hidaka
Yoshitaka Kubota
Yoshitaka Kubota
Application Number:
JP2011192823A
Publication Date:
September 30, 2015
Filing Date:
September 05, 2011
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
G11C17/14; G11C16/02
Domestic Patent References:
| JP2009290189A |
Attorney, Agent or Firm:
Minoru Kudo