Title:
半導体装置および半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5788350
Kind Code:
B2
Abstract:
A semiconductor device includes an interlayer insulating film containing Si, O, C, and H, an under-bump metal film disposed over the interlayer insulating film and containing Ni, and a bump electrode disposed over the under-bump metal film. In the interlayer insulating film, a ratio of a peak height of Si—CH3 near a wave number 1270 cm−1 to a peak height of Si—O near a wave number 1030 cm−1 obtained by Fourier-transform infrared spectroscopy (FTIR) is 0.15 or greater and 0.27 or less. A ratio of a peak height of Si—CH2—Si near a wave number 1360 cm−1 to the peak height of Si—CH3 near the wave number 1270 cm−1 is 0.031 or greater.
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Inventors:
Tatsuya Usami
Nakamura solstice
Naoki Fujimoto
Nakamura solstice
Naoki Fujimoto
Application Number:
JP2012066739A
Publication Date:
September 30, 2015
Filing Date:
March 23, 2012
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/316; H01L21/3205; H01L21/60; H01L21/768; H01L23/522
Domestic Patent References:
JP2004253791A | ||||
JP2006135213A | ||||
JP2011003586A | ||||
JP2008078621A | ||||
JP2009177023A | ||||
JP2013520030A | ||||
JP2006216541A | ||||
JP2005175085A | ||||
JP2004031918A | ||||
JP2009302340A | ||||
JP2005044976A |
Foreign References:
US20090200675 | ||||
WO2005108469A1 | ||||
WO2011103282A1 | ||||
US20120032311 | ||||
US20050194619 | ||||
WO2010090038A1 | ||||
US20050006665 |
Attorney, Agent or Firm:
Shinji Hayami
Satoshi Amagi
Satoshi Amagi
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