Title:
抵抗変化型メモリデバイスおよびその駆動方法
Document Type and Number:
Japanese Patent JP5811693
Kind Code:
B2
Abstract:
A variable-resistance memory device includes a memory array section including a main memory cell employing a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element, and a reference cell section including a reference cell provided with a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element and generating a reference current used for recognizing data of the main memory cell. The direction of an applied current serving as the reference current is set in accordance with the resistance state of the reference cell.
Inventors:
Hironobu Mori
Hiroshi Yoshihara
Hiroshi Yoshihara
Application Number:
JP2011183829A
Publication Date:
November 11, 2015
Filing Date:
August 25, 2011
Export Citation:
Assignee:
ソニー株式会社
International Classes:
G11C13/00
Domestic Patent References:
| JP2009187631A | ||||
| JP2011003241A | ||||
| JP2009117006A | ||||
| JP2010250880A | ||||
| JP2005050421A |
Attorney, Agent or Firm:
Takahisa Sato