Title:
半導体装置の組立治具および半導体装置の組立方法
Document Type and Number:
Japanese Patent JP5838559
Kind Code:
B2
Abstract:
In aspects of the assembly jig and method of the invention, when a packaging substrate is curved concaving upward at temperatures of melting solder, the gap between the assembly jig and the packaging substrate can be made smaller than the dimension of the sum of the thickness of the semiconductor chip and the thickness of the melted solder by allowing a part of the bottom surface of the chip positioning piece to become always, or substantially always, in contact with the upper surface of the packaging substrate owing to the weight of the chip positioning jig itself. As a consequence, the semiconductor chip does not slip aside out of the opening of the chip positioning piece. Therefore, the semiconductor chip can be positioned accurately on the packaging substrate.
More Like This:
JP5383795 | Semiconductor device |
WO/1994/000880 | SEMICONDUCTOR DEVICE |
Inventors:
Hideaki Takahashi
Application Number:
JP2011024611A
Publication Date:
January 06, 2016
Filing Date:
February 08, 2011
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
H01L21/52
Domestic Patent References:
JP2010098153A | ||||
JP2006216729A | ||||
JP2002361410A | ||||
JP6021110A | ||||
JP6104295A |
Attorney, Agent or Firm:
Akira Sakamoto
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