Title:
MEMSデバイスアセンブリ及びそのパッケージング方法
Document Type and Number:
Japanese Patent JP5930268
Kind Code:
B2
Abstract:
A MEMS device assembly (20) includes a MEMS die (22) and an integrated circuit (IC) die (24). The MEMS die (22) includes a MEMS device (36) formed on a substrate (38) and a cap layer (34). A packaging process (72) entails forming the MEMS device (36) on the substrate (38) and removing a material portion of the substrate (38) surrounding the device (36) to form a cantilevered substrate platform (46) at which the MEMS device (36) resides. The cap layer (34) is coupled to the substrate (38) overlying the MEMS device (36). The MEMS die (22) is electrically interconnected with the IC die (24). Molding compound (32) is applied to substantially encapsulate the MEMS die (22), the IC die (24), and interconnects (30) that electrically interconnect the MEMS device (22) with the IC die (24). The cap layer (34) prevents the molding compound (32) from contacting the MEMS device (36).
Inventors:
Mark E. Shurman
Echen Lin
Echen Lin
Application Number:
JP2011186665A
Publication Date:
June 08, 2016
Filing Date:
August 30, 2011
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
B81C3/00; B81B7/02; H01L23/02; H01L23/28
Domestic Patent References:
JP6291334A | ||||
JP2010008613A | ||||
JP2001050838A | ||||
JP9304211A | ||||
JP2010060541A | ||||
JP2000235044A | ||||
JP2007214186A |
Foreign References:
US20080236292 | ||||
WO2011162239A1 |
Attorney, Agent or Firm:
Atsushi Honda