Title:
半導体装置の作製方法
Document Type and Number:
Japanese Patent JP5931998
Kind Code:
B2
Abstract:
It is to provide a semiconductor memory device in which high voltage is not needed in writing, a defect is less likely to occur, the writing time is short, and data cannot be rewritten without an increase in cost. The semiconductor memory device includes a memory element which includes a diode-connected first transistor, a second transistor whose gate is connected to one terminal of a source electrode and a drain electrode of the diode-connected first transistor, and a capacitor connected to the one terminal of the source electrode and the drain electrode of the diode-connected first transistor and the gate of the second transistor.
Inventors:
Yasuyuki Takahashi
Toshihiko Saito
Toshihiko Saito
Application Number:
JP2014229469A
Publication Date:
June 08, 2016
Filing Date:
November 12, 2014
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L27/108; H01L21/8242
Domestic Patent References:
| JP2008089915A | ||||
| JP2009528670A | ||||
| JP2009212443A | ||||
| JP2007103918A | ||||
| JP2009167087A |
Foreign References:
| WO2007139009A1 | ||||
| WO2009075281A1 |