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Title:
集積MOS型バリキャップおよびこれを有する電圧制御発振器、フィルター
Document Type and Number:
Japanese Patent JP6395191
Kind Code:
B2
Abstract:
Each of varicaps 50A to 50C configured to be connected in parallel is an MOS capacitor III produced under a common and single process condition. Each of the varicaps 50A to 50C has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, and a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer. Each of the varicaps 50A to 50C is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages having different voltages to the second conductivity-type impurity region.

Inventors:
Masaaki Kamiya
Ryuji Ariyoshi
Application Number:
JP2016523405A
Publication Date:
September 26, 2018
Filing Date:
May 11, 2015
Export Citation:
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Assignee:
Interchip Corporation
International Classes:
H01L21/822; H01L21/329; H01L27/04; H01L29/94; H03B5/32
Domestic Patent References:
JP57099787A
JP2000252480A
JP9027732A
JP2001210788A
JP2007158766A
JP9307356A
JP2014039043A
JP2009004972A
JP2012064915A
JP2004120728A
Foreign References:
US20050151575
GB2363927A
Attorney, Agent or Firm:
Hiroyuki Kurihara
Mountain Saki Yuichiro