Title:
並列演算装置、並列演算システム、集合通信方法及び集合通信プログラム
Document Type and Number:
Japanese Patent JP6468066
Kind Code:
B2
Abstract:
A system includes a plurality of arithmetic devices configured to execute arithmetic processes in parallel. Each of plurality of arithmetic devices is configured to: determine whether a time period from the start of collective communication to reception from another arithmetic device involved in the collective communication is equal to or shorter than a predetermined threshold, determine a target arithmetic device that is among the plurality of arithmetic devices and for which a waiting scheme involved in the collective communication is to be changed when the time period is determined to be equal to or shorter than the predetermined threshold, and transmit, to the target arithmetic device, an instruction to change the waiting scheme involved in the collective communication.
Inventors:
Masahiro Miwa
Application Number:
JP2015098201A
Publication Date:
February 13, 2019
Filing Date:
May 13, 2015
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/52; G06F9/48
Domestic Patent References:
| JP2012128808A | ||||
| JP2014119918A | ||||
| JP7146797A |
Foreign References:
| US20140007111 |
Attorney, Agent or Firm:
Hiroaki Sakai