Title:
素子チップの製造方法および基板加熱装置
Document Type and Number:
Japanese Patent JP6524564
Kind Code:
B2
Abstract:
Provided is a manufacturing process of an element chip, which comprises a preparing step for preparing a substrate containing element regions and dicing regions, a holding step for holding the substrate and a frame with a holding sheet, an applicating step for applying a resin material solution containing a resin constituent and a solvent on the substrate to form a coated layer containing the resin constituent and the solvent thereon, a heating step for heating the substrate held on the holding sheet through a heat shielding member shielding the frame and the holding sheet to substantially remove the solvent from the coated layer, thereby to form a resin layer, a patterning step for patterning the resin layer to expose the substrate in the dicing regions, and a dicing step for dicing the substrate into element chips by plasma-etching the substrate.
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Inventors:
Matsubara Noriyuki
Hidehiko Karasaki
Hidehiko Karasaki
Application Number:
JP2017126365A
Publication Date:
June 05, 2019
Filing Date:
June 28, 2017
Export Citation:
Assignee:
Panasonic IP Management Co., Ltd.
International Classes:
H01L21/301; G03F7/20; H01L21/3065
Domestic Patent References:
| JP2008171844A | ||||
| JP2016181659A | ||||
| JP2014165182A |
Attorney, Agent or Firm:
Kawasaki/Hashimoto Patent Office
Shinichi Kawasaki
Yuko Tsumura
Shozo Yamashita
Kaoru Hashimoto
Shinichi Kawasaki
Yuko Tsumura
Shozo Yamashita
Kaoru Hashimoto