Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6526463
Kind Code:
B2
Abstract:
The manufacturing efficiency of a semiconductor device is improved. A method for manufacturing a semiconductor device includes a step of sealing a semiconductor chip using a mold die having a cavity, a gate part communicating with the cavity, and a vent part provided opposite to the gate part via the cavity, and extending in a first direction in a sealing step. Further, a lead frame has a first through hole provided at a position overlapping the cavity in the sealing step, and a second through hole provided outside the first through hole, and provided at a position overlapping the vent part in the sealing step. Whereas, in a second direction crossing with the first direction, the length of the second through hole is larger than the length (groove width) of the vent part.
Inventors:
Junji Ikura
Application Number:
JP2015073049A
Publication Date:
June 05, 2019
Filing Date:
March 31, 2015
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/56; H01L23/50
Domestic Patent References:
| JP2005347769A | ||||
| JP6310642A | ||||
| JP8078596A | ||||
| JP2014229884A |
Attorney, Agent or Firm:
Tsutsui International Patent Office