Title:
半導体装置
Document Type and Number:
Japanese Patent JP6538789
Kind Code:
B2
Abstract:
The present invention provides an ultrathin thin film integrated circuit and a thin film integrated circuit device including the thin film integrated circuit device. Accordingly, the design of a product is not spoilt while an integrated circuit formed from a silicon wafer, which is thick and produces irregularities on the surface of the product container. The thin film integrated circuit according to the present invention includes a semiconductor film as an active region (for example a channel region in a thin film transistor), unlike an integrated circuit formed from a conventional silicon wafer. The thin film integrated circuit according to the present invention is thin enough that the design is not spoilt even when a product such as a card or a container is equipped with the thin film integrated circuit.
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Inventors:
Yasuyuki Arai
Akira Ishikawa
Toru Takayama
Junya Maruyama
Yugo Goto
Yumiko Fukumoto
Yuko Ebado
Akira Ishikawa
Toru Takayama
Junya Maruyama
Yugo Goto
Yumiko Fukumoto
Yuko Ebado
Application Number:
JP2017177230A
Publication Date:
July 03, 2019
Filing Date:
September 15, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/336; G06K19/077; H01L21/77; H01L21/8234; H01L21/84; H01L27/088; H01L27/12; H01L29/786
Domestic Patent References:
| JP2002305209A | ||||
| JP2003174153A | ||||
| JP8006071A | ||||
| JP2003045890A |
Foreign References:
| US20030032210 | ||||
| US20030134460 |