Title:
電力変換回路
Document Type and Number:
Japanese Patent JP6549200
Kind Code:
B2
Abstract:
Provided is a power conversion circuit for achieving a power conversion device capable of suppressing charging/discharging of a parasitic capacitor caused by high-frequency switching, and of reducing a loss of a semiconductor switching element. The power conversion circuit includes: a circuit board including a plurality of layers including two or more layers, on which circuit patterns are formed; and a plurality of semiconductor switching elements connected to the circuit patterns of the circuit board, and configured to perform switching for power conversion. In the circuit board, a plurality of control ground patterns for different nodes, which are configured to drive the plurality of semiconductor switching elements, are arranged so as not to overlap one another in plan view.
More Like This:
| JP3107708 | Plasma display device |
| JP5167929 | Switching power supply |
Inventors:
Kaoru Hayase
Application Number:
JP2017193583A
Publication Date:
July 24, 2019
Filing Date:
October 03, 2017
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H02M3/28; H02M1/08; H02M7/48; H05K1/02
Domestic Patent References:
| JP2009130967A | ||||
| JP2015154591A | ||||
| JP2008118815A | ||||
| JP6005847A |
Foreign References:
| WO2016152366A1 |
Attorney, Agent or Firm:
Michiharu Soga
Kajinami order
Kazuhiro Oyaku
Shunichi Ueda
Junichiro Yoshida
Kajinami order
Kazuhiro Oyaku
Shunichi Ueda
Junichiro Yoshida