Title:
半導体モジュール
Document Type and Number:
Japanese Patent JP6559743
Kind Code:
B2
Abstract:
A circuit board includes a core layer including a plurality of metal layers laminated one over another, a bottommost metal layer of the plurality of metal layers being thickest, and a topmost metal layer of the plurality of metal layer being thinnest; an upper insulating layer and an upper conductive pattern provided over a top surface of the core layer; and a lower insulating layer and a lower conductive pattern provided below a bottom surface of the core layer, wherein the topmost metal layer of the core metal layer is patterned to have a prescribed shaped section that serves as wiring and that is connected to the upper conductive pattern, wherein a metal ratio that is defined as a ratio of an area that is formed of metal relative to an entire area in a plan view is higher in the bottommost metal layer than in the topmost metal layer.
Inventors:
Yuichi Sugiyama
Masashi Miyazaki
Yoshiki Hamada
Masashi Miyazaki
Yoshiki Hamada
Application Number:
JP2017153327A
Publication Date:
August 14, 2019
Filing Date:
August 08, 2017
Export Citation:
Assignee:
TAIYO YUDEN CO.,LTD.
International Classes:
H01L23/12; H01L23/14; H01L23/36; H05K3/46
Domestic Patent References:
| JP2009194322A | ||||
| JP10326849A |
Foreign References:
| WO1997020347A1 | ||||
| WO2001000508A1 |
Attorney, Agent or Firm:
Isshiki International Patent Service Corporation