Title:
絶縁ゲート型半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP6569216
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an insulated gate type semiconductor device capable of simultaneously achieving increase in withstanding voltage and reduction in on-resistance independently of a width of a U-groove, and to provide a method of manufacturing the same.SOLUTION: An insulated gate type semiconductor device comprises: an n-type drift region 12; a p-type column region 16a sandwiching the drift region 12 by vertical side walls and alternately arranged with the drift region 12; a p-type base region 13 arranged on the drift region 12; a gate insulating film provided on a side wall of a U-groove 51 arranged on the column region 16a; a gate electrode 32 buried in the U-groove 51; and an n-type source region 14 arranged on an upper part of the base region 13 so that its side part is contacted with the gate insulating film. A width of the U-groove 51 is larger than that of the column region 16a.SELECTED DRAWING: Figure 1
Inventors:
Dread
Tetsuya Hayashi
Yasuaki Hayami
Ryota Tanaka
Tetsuya Hayashi
Yasuaki Hayami
Ryota Tanaka
Application Number:
JP2014258400A
Publication Date:
September 04, 2019
Filing Date:
December 22, 2014
Export Citation:
Assignee:
Nissan Motor Co., Ltd
International Classes:
H01L29/78; H01L21/329; H01L21/336; H01L29/06; H01L29/12; H01L29/861; H01L29/868
Domestic Patent References:
| JP2009200300A | ||||
| JP2007012977A | ||||
| JP2008511982A | ||||
| JP2005333068A | ||||
| JP2006165441A | ||||
| JP2014103169A | ||||
| JP2012049258A |
Attorney, Agent or Firm:
Tetsuya Mori
Suzuki Isobe
Hide Tanaka Tetsu
Toru Miyasaka
Suzuki Isobe
Hide Tanaka Tetsu
Toru Miyasaka