Title:
半導体装置
Document Type and Number:
Japanese Patent JP6630810
Kind Code:
B2
Abstract:
Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: τ1 and τ2, τ1<τ2 is satisfied, and τ2 is 300 seconds or less. In addition, a semiconductor device including the transistor is manufactured.
More Like This:
Inventors:
Masashi Tsubuki
Takuyuki Inoue
Hiraishi Suzunosuke
Kikuchi carving
Hiromitsu Goto
Shuhei Yoshitomi
Hiroki Inoue
Miyanaga Saki
Shunpei Yamazaki
Takuyuki Inoue
Hiraishi Suzunosuke
Kikuchi carving
Hiromitsu Goto
Shuhei Yoshitomi
Hiroki Inoue
Miyanaga Saki
Shunpei Yamazaki
Application Number:
JP2018244205A
Publication Date:
January 15, 2020
Filing Date:
December 27, 2018
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786
Domestic Patent References:
| JP2007250984A | ||||
| JP2009277701A | ||||
| JP2008042088A | ||||
| JP2008281988A | ||||
| JP2007300112A | ||||
| JP2009275236A |
Foreign References:
| US20090072233 | ||||
| CN101467257A | ||||
| KR1020080098423A | ||||
| WO2009139428A1 | ||||
| KR1020080052107A | ||||
| US20080038882 | ||||
| US20100084648 | ||||
| US20070257256 | ||||
| CN101068040A | ||||
| KR1020070107606A | ||||
| US20100109002 | ||||
| CN101663762A |