Title:
プロセスウィンドウを最適化する方法
Document Type and Number:
Japanese Patent JP6641422
Kind Code:
B2
Abstract:
A defect prediction method for a device manufacturing process involving processing a pattern onto a substrate, the method comprising: identifying a processing window limiting pattern (PWLP) from the pattern; determining a processing parameter under which the PWLP is processed; and determining or predicting, using the processing parameter, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the PWLP with the device manufacturing process.
Inventors:
Funche, Stefan
Belanki, benugopal
Belanki, benugopal
Application Number:
JP2018114918A
Publication Date:
February 05, 2020
Filing Date:
June 15, 2018
Export Citation:
Assignee:
AS M Netherlands B.V.
International Classes:
G03F7/20
Domestic Patent References:
| JP2008268560A | ||||
| JP2007041600A |
Foreign References:
| US20060273266 |
Other References:
Hyunjo Yang,Jaeseung Choi,Byungug Cho,Jongkyun Hong,Jookyoung Song,et al.,New OPC verification Method using Die-to Database Inspection,PROCEEDINGS OF SPIE,米国,2006年 3月24日,Vol.6152 ,615232-1~615232-9
Attorney, Agent or Firm:
Yoshiyuki Inaba
Toshifumi Onuki
Akihiko Eguchi
Kazuhiko Naito
Toshifumi Onuki
Akihiko Eguchi
Kazuhiko Naito