Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP6649700
Kind Code:
B2
Abstract:
Semiconductors and methods of manufacturing semiconductors are provided. A semiconductor can include a plurality of insulating layers, and a plurality of conductive layers, with the insulating layers and the conductive layers alternately stacked. A plurality of through electrodes penetrate the conductive layers. At least some the through electrodes are electrically connected to one of the conductive layers. In addition, different conductive layers are connected to different through electrodes. A method of forming a semiconductor structure includes providing a plurality of antifuses, wherein each of the through electrodes is separated from each of the conductive layers by an antifuse. The method further includes supplying at least a first voltage to a first through electrode while applying less than a second voltage to the other electrodes, wherein the first voltage is greater than the second voltage.
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Inventors:
Shiigamoto Tsunenori
Application Number:
JP2015107672A
Publication Date:
February 19, 2020
Filing Date:
May 27, 2015
Export Citation:
Assignee:
Sony Semiconductor Solutions Corporation
International Classes:
H01L27/10; H01L45/00; H01L49/00
Domestic Patent References:
| JP2010225918A | ||||
| JP2012186302A | ||||
| JP2015076556A | ||||
| JP2013187335A |
Foreign References:
| US8970040 | ||||
| US20130095654 |
Attorney, Agent or Firm:
Patent Business Corporation Tsubasa International Patent Office