Title:
薄膜トランジスタ
Document Type and Number:
Japanese Patent JP6659255
Kind Code:
B2
Abstract:
This thin film transistor has a gate electrode, a gate insulating film, an oxide semiconductor thin film, an etch stop layer for protecting the oxide semiconductor thin film, a source and drain electrodes, and a passivation film in this order on a substrate. The oxide semiconductor thin film is formed of an oxide configured from In, Ga and Sn as metal elements, and O, and has an amorphous structure, and the etch stop layer and/or the passivation film includes SiNx. The thin film transistor has an extremely high mobility of approximately 40 cm2/Vs or more.
Inventors:
Mototaka Ochi
Takanashi Yasuyuki
Aya Miki
Hiroshi Goto
Kugimiya Toshihiro
Takanashi Yasuyuki
Aya Miki
Hiroshi Goto
Kugimiya Toshihiro
Application Number:
JP2015132533A
Publication Date:
March 04, 2020
Filing Date:
July 01, 2015
Export Citation:
Assignee:
KABUSHIKI KAISHA KOBE SEIKO SHO
International Classes:
H01L29/786; C23C14/08; H01L21/336; H01L21/363
Domestic Patent References:
JP2011187506A | ||||
JP2011142309A | ||||
JP2010166030A | ||||
JP2007103918A | ||||
JP2010182818A |
Foreign References:
WO2014034872A1 | ||||
WO2012086595A1 | ||||
WO2013027391A1 | ||||
WO2011105047A1 | ||||
US20140077203 | ||||
US20080299702 |
Attorney, Agent or Firm:
Patent business corporation glory patent office