Title:
異種マルチコアシステム用のダイナミックコア選択
Document Type and Number:
Japanese Patent JP6661865
Kind Code:
B2
Abstract:
Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core.
Inventors:
Wu, Yufen
Fu, Searian
Borin, Edson
Wan, Chen
Fu, Searian
Borin, Edson
Wan, Chen
Application Number:
JP2016003910A
Publication Date:
March 11, 2020
Filing Date:
January 12, 2016
Export Citation:
Assignee:
INTEL CORPORATION
International Classes:
G06F9/50
Domestic Patent References:
| JP2010538371A | ||||
| JP2004171234A | ||||
| JP2006277364A | ||||
| JP2010160715A |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation