Title:
メモリ制御装置及びメモリ制御方法
Document Type and Number:
Japanese Patent JP6674309
Kind Code:
B2
Abstract:
A memory control apparatus including: a writing unit configured to output a write request for writing to a memory and issues a first event every time a write operation of each of the first blocks is completed; a reading unit configured to output a readout request for reading of image data that has been written to the memory by the writing unit and issues a second event every time a readout operation of the second block is completed; and a controller that performs a process of incrementing a count value in response to the first event, performs a process of decrementing the count value in response to the second event, and controls whether to permit the write request and the readout request, respectively, based on the count value.
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Inventors:
Neiji Owa
Application Number:
JP2016082746A
Publication Date:
April 01, 2020
Filing Date:
April 18, 2016
Export Citation:
Assignee:
Canon Inc
International Classes:
G06F12/00
Domestic Patent References:
| JP2008117135A | ||||
| JP2003323333A | ||||
| JP6278319A |
Attorney, Agent or Firm:
Okabe
Takao Ochi
Koji Yoshizawa
Masami Saito
Takao Ochi
Koji Yoshizawa
Masami Saito