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Title:
固有情報生成装置
Document Type and Number:
Japanese Patent JP6697776
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To generate unique information with high repeatability even if the power supply voltage varies, when generating unique information difficult to replicate based on the physical characteristics of its constituent circuit elements, by using a circuit simulating the structure of a linear feedback shift register.SOLUTION: Based on the technique of PL(Pseado-LFSR)-PUF(physically unclonable function), a PL-PUF circuit 11 generates unclonable unique information of multiple bits based on the physical characteristics of its constituent circuit elements, by using a circuit simulating the structure of a LFSR (linear feedback shift register). A response acquisition timing generation circuit 12 is supplied with same power supply voltage from a power supply voltage source 13 for supplying a power supply voltage to the PL-PUF circuit, and operates to generate a response acquisition timing signal and to supply to the PL-PUF circuit, thus controlling its operation. Since the power supply voltage of the response acquisition timing generation circuit varies by the same value, when the power supply voltage of the PL-PUF circuit varies, change of response is suppressed, and error rate of unique information to be generated is reduced.SELECTED DRAWING: Figure 1

Inventors:
Yasuhiro Ogasawara
Youhei Hori
Toshihiro Katashita
Application Number:
JP2016066788A
Publication Date:
May 27, 2020
Filing Date:
March 29, 2016
Export Citation:
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Assignee:
National Institute of Advanced Industrial Science and Technology
International Classes:
H04L9/10; G09C1/00
Domestic Patent References:
JP2005269196A
JP11204649A
JP2007060191A
JP2007533225A
JP2002005862A
JP63107312A
Other References:
HORI, Yohei et al.,Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function,Proceedings of 2011 International Conference on Reconfigurable Computing and FPGAs,IEEE,2011年,pp. 223-228,[DOI: 10.1109/ReConFig.2011.72]



 
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