Title:
半導体装置及び半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6701916
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a highly-reliable multi-chip module formed by a plurality of semiconductor chips at a low cost.SOLUTION: A semiconductor device has: a metal layer; a first semiconductor element and a second semiconductor element thicker than the first semiconductor element that are provided above the metal layer; and a connection electrode provided on the first semiconductor element. A total thickness of the first semiconductor element and the connection electrode is substantially the same as a thickness of the second semiconductor element.SELECTED DRAWING: Figure 4
Inventors:
Gen Sato
Naoya Okamoto
Naoya Okamoto
Application Number:
JP2016085264A
Publication Date:
May 27, 2020
Filing Date:
April 21, 2016
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L25/04; H01L21/3205; H01L21/768; H01L23/28; H01L23/36; H01L23/522; H01L25/07; H01L25/18
Domestic Patent References:
| JP2012156316A | ||||
| JP2013125931A | ||||
| JP2014192170A | ||||
| JP2013038306A | ||||
| JP2005354120A |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Takao Kato
Tadahiko Ito
Takao Kato