Title:
ＣＰＵスタンバイ復帰構造
Document Type and Number:
Japanese Patent JP6762656
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a CPU standby reset structure allowing a reset even when an external interruption is not performed.SOLUTION: The CPU standby reset structure includes: an external interruption unit 2 that applies an external interruption to a CPU 1 in a sleep state at a predetermined cycle and starts the CPU 1; an external reset unit 3 for resetting the CPU 1 when a first predetermined time has passed in an external timer; and an internal interruption unit 4 that is built in the CPU 1, and, when a second predetermined time has passed in an internal timer, applies an internal interruption to the CPU 1 to start a CPU. Upon being started by the external interruption, the CPU 1 resets the external timer and internal timer. The first predetermined time is set longer than the second predetermined time, and the second predetermined time is set longer than the predetermined cycle.SELECTED DRAWING: Figure 1
Inventors:
Takeo Yoshio
Cedar saki Yugo
Cedar saki Yugo
Application Number:
JP2016058499A
Publication Date:
September 30, 2020
Filing Date:
March 23, 2016
Export Citation:
Assignee:
Japan Radio Co., Ltd.
International Classes:
G06F1/329; G06F1/24; G06F9/48
Domestic Patent References:
| JP11110232A | ||||
| JP2004213197A | ||||
| JP2003067220A |
Foreign References:
| WO2011145198A1 |
Attorney, Agent or Firm:
Harushima Shigetokiro