Title:
レギュレータアンプ回路
Document Type and Number:
Japanese Patent JP6767330
Kind Code:
B2
Abstract:
A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the nMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.
More Like This:
| JP3838708 | LITHIUM ION POWER UNIT |
| JPH02183817 | POWER UNIT |
Inventors:
Ueda Nobuhiro
Application Number:
JP2017180530A
Publication Date:
October 14, 2020
Filing Date:
September 20, 2017
Export Citation:
Assignee:
Toshiba Corporation
Toshiba Electronic Devices & Storage Corporation
Toshiba Electronic Devices & Storage Corporation
International Classes:
G05F1/56
Domestic Patent References:
| JP201299199A | ||||
| JP6332550A | ||||
| JP2006174180A |
Foreign References:
| WO2017131906A1 | ||||
| US20130049721 |
Attorney, Agent or Firm:
Patent Business Corporation Itoshin International Patent Office