Title:
実装方法および実装装置
Document Type and Number:
Japanese Patent JP6817826
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To stabilize a semiconductor chip at high precisely, and mount the semiconductor chip to a circuit board.SOLUTION: A mounting method includes: a second adhesion member adhering step of adhering a second adhesion member 6 to a first surface of a semiconductor chip 1; a first adhesion force reduction step of reducing an adhesion force of a first adhesion member 4; a third adhesion member adhering step of adhering a second surface to a third adhesion member by peeling the semiconductor chip to which the second adhesion member is adhered from the first adhesion member; a second adhesion force reduction step of reducing the adhesion force of the second adhesion member; and a mounting step of peeling the first surface of the semiconductor chip held by a mounting head from the third adhesion member, and mounting the semiconductor chip to a circuit board. The adhesion force of the third adhesion member is smaller than that of the first adhesion member.SELECTED DRAWING: Figure 2
Inventors:
Yoshiyuki Arai
Application Number:
JP2017009030A
Publication Date:
January 20, 2021
Filing Date:
January 21, 2017
Export Citation:
Assignee:
Toray Engineering Co., Ltd.
International Classes:
H01L21/60; H05K13/04
Domestic Patent References:
| JP2009038331A | ||||
| JP2010219209A |
Attorney, Agent or Firm:
Kazumasa Okumura