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Title:
多層セラミック基板およびその製造方法
Document Type and Number:
Japanese Patent JP6819603
Kind Code:
B2
Abstract:
A multilayer ceramic substrate includes: a plurality of ceramic layers 300a, 300b stacked together; a via hole 400a, 400b provided in each of the plurality of ceramic layers, the via holes of the plurality of ceramic layers being connected together in a layer stacking direction of the plurality of ceramic layers; a via wire 406a, 406b including an electrical conductor filled into each of the via holes; a first conductor 404a, 404b provided on an upper surface of at least one of the plurality of ceramic layers, the first conductor having an annular or partially annular shape surrounding the via wire; and a second conductor 403a, 403b including a first portion and a second portion, the first portion being located outside the first conductor on the upper surface of the at least one ceramic layer, the second portion overlying the first conductor, and an inner rim of the second portion being located outside an inner rim of the first conductor, wherein a thickness of the first conductor 404a, 404b is greater than a thickness of the second conductor 403a, 403b.

Inventors:
Kenji Hayashi
Application Number:
JP2017546543A
Publication Date:
January 27, 2021
Filing Date:
October 17, 2016
Export Citation:
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Assignee:
Hitachi Metals Co., Ltd.
International Classes:
H05K3/46
Domestic Patent References:
JP2009152531A
JP2014222686A
JP410591A
JP8274467A
Attorney, Agent or Firm:
Seiji Okuda
Osamu Kita
Michi Kajitani