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Title:
シランカップリング剤処理装置、半導体チップ製造ライン、及び半導体ウェハの製造方法
Document Type and Number:
Japanese Patent JP6916662
Kind Code:
B2
Abstract:
To provide a method of manufacturing a semiconductor wafer subjected to silane coupling agent processing while preventing an adhesive agent from being peeled off even in a case where the silane coupling agent processing is performed on the semiconductor wafer temporarily adhered to the other member by the adhesive agent, and to provide a silane coupling agent processing device used for the method.SOLUTION: A silane coupling agent processing device for performing silane coupling agent processing of one surface of a semiconductor wafer, comprises: closed space formation members; decompression means connected with one or more of the closed space formation members; and gaseous silane coupling agent supply means connected with one or more of the closed space formation members.SELECTED DRAWING: Figure 1

Inventors:
Katsunori Funaki
Naoko Tsuji
Application Number:
JP2017095586A
Publication Date:
August 11, 2021
Filing Date:
May 12, 2017
Export Citation:
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Assignee:
Daicel Corporation
International Classes:
H01L21/02
Domestic Patent References:
JP2015178237A
JP2015131481A
JP2001015472A
JP7037768A
Foreign References:
WO2013065771A1
Attorney, Agent or Firm:
Goto Patent Office