Title:
電子制御装置
Document Type and Number:
Japanese Patent JP7333251
Kind Code:
B2
Abstract:
To appropriately execute a task by an electronic control device including a processor having a plurality of cores. An ECU 100 includes a multi-core CPU having a plurality of cores that execute a first task that has an execution time that varies depending on a processing amount every predetermined cycle and a second task that is higher in priority than the first task and is prohibited from being interrupted. The second task is set to be inexecutable simultaneously between the plurality of cores. A task allocation unit 11 generates a first plan. A diagnosis task planning unit 12 generates a second plan. Task processing units 10a and 10b execute the first task based on the first plan. A diagnosis task correction unit 13 times a delay time of the first task executed by the task processing units 10a and 10b, and postpones the second task of the second plan to the subsequent executable timing in accordance with the timed delay time. A diagnosis unit 14 executes the second task for each core based on the second plan corrected by the diagnosis task correction unit 13.
Inventors:
Masashi Mizoguchi
Fumio Narusawa
Hiroyuki Nakamura
Yu Ishigooka
Yuki Tanaka
Fumio Narusawa
Hiroyuki Nakamura
Yu Ishigooka
Yuki Tanaka
Application Number:
JP2019216011A
Publication Date:
August 24, 2023
Filing Date:
November 29, 2019
Export Citation:
Assignee:
Hitachi Astemo, Ltd.
International Classes:
G06F9/48
Domestic Patent References:
| JP2013152636A | ||||
| JP895807A | ||||
| JP2013167945A | ||||
| JP201097432A |
Attorney, Agent or Firm:
Patent Attorney Corporation Wilfort International Patent Office