Title:
【発明の名称】モノリシツク集積された光導波路・フオトダイオード・FET組合せ回路
Document Type and Number:
Japanese Patent JPH02502953
Kind Code:
A
Abstract:
PCT No. PCT/DE88/00184 Sec. 371 Date Dec. 4, 1989 Sec. 102(e) Date Dec. 4, 1989 PCT Filed Mar. 23, 1988 PCT Pub. No. WO88/08205 PCT Pub. Date Oct. 20, 1988.Monolithically integrated waveguide-photodiode-FET combination comprising waveguide layer (2), photodiode layer (3), FET layer (4) and a common cover layer (5) applied on a carrier substrate (1) of III-V semiconductor material, having butt coupling between waveguide layer (2) and photodiode layer (3), having introduced dopings for fashioning photodiodes and FETs and having a parting region (19) for the limitation of photodiodes and FETs.
Inventors:
Trommers, liners
Albrecht, Helmut
Albrecht, Helmut
Application Number:
JP50274288A
Publication Date:
September 13, 1990
Filing Date:
March 23, 1988
Export Citation:
Assignee:
Siemens, Actien Gezershaft
International Classes:
H01L31/10; G02B6/12; G02B6/42; H01L27/14; H01L27/144; H01L31/103; H04B10/69; (IPC1-7): H01L27/14; H01L31/10
Attorney, Agent or Firm:
Tomimura Kiyoshi